摘要
提出了一种基于∑-△调制(SDM)的单比特BP人工神经网络的硬件实现方法。设计了基于∑-△单比特信号的非线性立方根运算单元,并以此为激活函数单元构建了BP人工神经网络,网络中各神经元的输入输出均为基于∑-△调制的单比特信号。在此基础上实现S函数逼近和网络隐含层的非线性输出。同时采用低环路延时加法器、混合信号乘法器作为关键运算单元,减少了硬件消耗,提高了运算精度。最后在可编程门阵列(FPGA)上实现整个非线性BP人工神经网络,并通过函数逼近的实例验证了该网络的功能。
A new method for implementation of the hardware of single-bit feed-forward BP artificial neural networks by using sigma-delta modulation (SDM)was presented. The nonlinear cube-root calculation unit based on single-bit streams was designed, and by taking it as the activation function, the BP artificial neural network was constructed. The signals from the network' s input and output of each neuron were represented by sigma-delta modulated singlebit streams. As the activation function in the hidden layer should be nonlinear, the log-Sigmoid squashing function approximation was obtained through the design of a cube-root computation module based on sigma-delta bit stream. A little-loop-delay adder and a hybrid-signal multiplier were also presented as the key function elements of the sys- tem to offer low hardware consumption and high precision. The neurons and the whole BP neural network were implemented and simulated on a field programmable gate array(FPGA). Two examples of function approximation successfully demonstrate that the sigma-delta bit stream technique is viable for the hardware implementation of BP neu- ral networks.
出处
《高技术通讯》
CAS
CSCD
北大核心
2013年第12期1316-1322,共7页
Chinese High Technology Letters
基金
国家自然科学基金(61076118)资助项目