摘要
在设计实现数字存储示波器的过程当中,数字内插技术已经成为必须要掌握的重要技术之一.根据示波器的性能指标有效存储带宽,设计了一种基于正弦内插算法的数字内插方法.该数字内插方法中所有模块均利用Verilog语言在Altera的FPGA芯片EP3C25E144C8上得到了实现和验证.该正弦内插算法中增采样的实现不同于传统方法中的补零法,而是采用数据保持的方法.介绍了正弦内插算法的详细推导、插值核的优化方法以及FPGA的具体实现,最后给出了整个设计分别在Matlab和ModelSim-Altera 6.6d下的仿真结果.
Digital interpolation technique had become one of the key technologies that must be grasped when designing a digital storage oscilloscope. A digital interpolation method based on sinc interpolation algorithm was presented in accordance with oscilloscope's memory bandwidth. All of the modules in this design were implemented on the FPGA of Altera. The realization of upsampling in this sinc interpolation algorithm was different from the conventional approach. Data holding was adopted instead of using zero padding. The detail derivation of sinc interpolation algorithm, the optimization method about the interpolation function and the concrete implementation on FPGA were introduced in this article. At last, simulations based on Matlab and ModelSim Altera 6.6d were given.
出处
《河南大学学报(自然科学版)》
CAS
北大核心
2014年第1期94-98,共5页
Journal of Henan University:Natural Science