摘要
Currently,the mainstream vector network analyzer employs embedded computer module with a digital intermediate frequency(IF)board to form a high performance windows platform.Under this structure,the vector network analyzer needs a powerful encoding system to arbitrate the bus acquirement,which is usually realized by field-programmable gate array(FPGA)chip.The paper explores the shared bus design method of the digital signal processing(DSP)board in network analyzer.Firsty,it puts an emphasis on the system structure,and then the shared bus communication method is described in detail;Finally,the advantages of the shared bus communication mechanism are summanzed.
Currently,the mainstream vector network analyzer employs embedded computer module with a digital intermediate frequency （IF） board to form a high performance windows platform.Under this structure,the vector network analyzer needs a powerful encoding system to arbitrate the bus acquirement,which is usually realized by field-programmable gate array （FPGA） chip.The paper explores the shared bus design method of the digital signal processing （DSP） board in network analyzer.Firsty,it puts an emphasis on the system structure,and then the shared bus communication method is described in detail; Finally,the advantages of the shared bus communication mechanism are summanzed.
