摘要
针对以往基于微处理器的流量统计技术已不能满足网络接口带宽快速增长的实际应用需求问题,提出一种基于硬件实现NetFlow的流量统计系统的实现方案。通过充分利用FPGA并行处理的优势,以FPGA+DDRII为核心处理单元,采用全流统计模式,解决了以往采用抽样统计造成的信息偏差问题。实际测试结果表明,该系统满足10Gbps带宽下的实时处理和高精度的识别,与传统软件实现相比,流识别的准确率最大能提高约37%。
A hardware-based implementation NetFlow traffic data collection system scheme is proposed to solve the problem of the information deviation caused by the conventional sampling statistics. The scheme uses FPGAq-DDRII as the core processing unit, makes full use of FPGA parallel processing advantages and adopts full flow statistical mode. Tests show that the system meet the 10Gbps bandwidth real-time processing and high-precision identification, compared with traditional software implemen- tation, the maximum flow rate of recognition accuracy of the system can be increased by about 37%.
出处
《计算机工程与设计》
CSCD
北大核心
2014年第2期381-385,共5页
Computer Engineering and Design
基金
国家863高技术研究发展计划基金项目(2011AA01A103)
