摘要
在分析CRC编码算法的基础上,从传统的串行编码算法着手,推导出适合高速通信的并行算法,通过FPGA(现场可编程门阵列)验证确保算法代码的逻辑功能正确;采用中芯国际simc18(180nm工艺库)实现了并行CRC32编码芯片的设计.该设计具有编码速度快、占用资源少、低功耗、易于量产等优点.
This paper analyzes the theory of CRC coding algorithm, calculates parallel algorithm which applies to high-speed communication, according to the traditional serial coding algorithm, ensures the logic function correctly by FPGA verification; achieves parallel CRC32 coding chip design with simc18 (180 nm technology library). The advantages of the design is faste:r coding , less resource, low-power, easier to large-scale production and so on.
出处
《河北大学学报(自然科学版)》
CAS
北大核心
2014年第1期89-93,共5页
Journal of Hebei University(Natural Science Edition)
基金
河北省自然科学基金资助项目(F2009000226)
河北省教育厅科学研究计划项目(2008308)