可变生成多项式与输入位宽的并行CRC

Parallel CRC Algorithm with Variable Generator and Data Width

介绍了两种LFSR类型的CRC且比较了它们的特性,然后以II型LFSR为基础,分两步先后推导出任意m比特的直接并行计算以及如何进行连续m比特的计算,即得到可变生成多项式与输入位宽的并行CRC算法,最后举例给出基于CCITT-16协议的4比特输入位宽的VHDL程序实现代码并给出仿真验证结果。由此对于给定的生成多项式与输入位宽,通过提出的算法用C语言或者硬件电路描述语言可以实现快速简单的并行CRC计算。

The paper describes two methods of LFSR and compares their features. Then based on type II of LFSR, it derives in two steps the calculation of‘m＇bits parallel data in one clock cycle and the execution of continuous parallel calculation. So the whole algorithm for variable generator and data width can be real-ized. Finally, an example based on CCITT-16 and 4 bit data width is provided by using VHDL,and the simulation result also given. Therefore for certain generator and data width, parallel CRC could be comple-ted quickly and easily by C or hardware description language.