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站域信息实时同步采集中同步采样时钟的设计 被引量:11

Design of Synchronous Sampling Clock in Real-time Synchronous Acquisition of Substation Area Information
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摘要 站域信息实时同步采集是智能变电站中实现全景信息采集的关键技术。在研究基于全球定位系统(GPS)采样数据同步的基础上,针对合并单元同步采样时钟对晶振依赖性强,及在晶振老化、频率准确度降低的情况下输出误差较大等不足,提出了一种基于现场可编程门阵列(FPGA)的同步采样时钟闭环校正实现方法。通过对2种同步采样时钟输出误差的定量分析,证明可通过软件补偿改善输出误差,并在提高同步采样脉冲输出精度的同时,保证输出相位的一致性。实验验证表明,该方法在使用普通石英晶振时,合并单元的同步采样值能达到0.2s级精度,体现了良好的同步性能。 Real-time synchronous acquisition of wide-area information is the key technology of realizing panoramic information acquisition in the intelligent substation. Based on a study of global positioning system (GPS) sampling data synchronization, a method of realizing closed-loop calibration system of synchronous sampling clock based on the field programmable gate array (FPGA) is proposed to make up for the inadequacy of synchronous sampling clock's high dependence on the oscillator clock in conventional merging unit and relatively larger output error in the case of aging of the oscillator and reduced accuracy of frequency. By analyzing the output errors of two synchronous sampling clocks quantitatively, it is revealed that the output error can be reduced by software compensation using this method, which ensures accordance of the output phase as well as improves accuracy of the synchronous sampling pulse output. It is verified that the synchronous sampling value of the merging unit can meet the 0.2 s class accuracy standard when an ordinary quartz oscillator is used, reflecting good synchronization.
出处 《电力系统自动化》 EI CSCD 北大核心 2014年第6期106-111,共6页 Automation of Electric Power Systems
关键词 合并单元 现场可编程门阵列 同步采样 晶振时钟 闭环系统 输出误差 merging unit field programmable gate array (FPGA) synchronous sampling oscillator clock closed-loopsystem output error
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