一种用perl编写FPGA内建测试向量的方法

A Method Write Built in Test Vector for FPGA Using Perl

随着IC技术的发展,高集成度和高复杂度的器件不断出现,其相应的测试技术也成为了一个重要的研究方向。对资源丰富的FPGA芯片来说,编写合适的内建测试向量显得尤为重要。介绍了用perl语言编写基于XDL语言测试向量的方法。在对FPGA芯片进行测试设计时,由于软件本身的编辑和约束功能有局限性,其设计效率和便利性不足,并且在某些情况下不能达到设计者对芯片内部资源使用和连线通路的特殊设计要求,因此可使用该研究的XDL编辑方法对设计文件进行高效、高自由度的约束和编辑,从而达到较高的测试覆盖率和较好的测试效率。

With the development of IC technology, high integration and high complexity devices emerging, and its corresponding test technology has become an important research direction. On the resource-rich FPGA, the preparation of appropriate test vectors is particularly important. The paper presents the perl language creating test vectors based XDL language approach. Design on FPGA chip test, since the software itself editing function has limitations and constraints, the lack of efifciency and convenience design, and in some cases cannot reach inside the chip designer resource use and special design of the connection path requirements, so you can use XDL studied in the paper the design document editing method for efifcient, high degree of freedom and editorial constraints, so as to achieve higher test coverage and better testing efifciency.