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低复杂度QAM解映射模块的实现 被引量:1

Implementation of low-complexity QAM demapper
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摘要 现代数字通信系统通常采用高阶QAM系统以提高频谱效率,但是采用传统Max-Log-MAP算法的QAM解映射具有很高的实现复杂度。该文采用一种基于Max-LogMAP算法的简化算法,结合QAM星座图对称结构,通过减少比较器和乘法器数量,在FPGA上实现了一种低复杂度的QAM解映射模块,并通过Matlab仿真和FPGA硬件测试验证了所实现的QAM解映射模块的性能。测试结果证明,利用简化算法实现的QAM解映射模块与传统MaxLog-MAP解映射模块相比具有相同的吞吐率和误码性能,且能有效减少QAM解映射模块的硬件资源。 High-order quadrature commonly used in modern digital amplitude modulation (QAM) is eonmmnication systems to obtain high bandwidth spectra. However, the demapper associated with the standard max-sum approximation of the maximum a posteriori probability in the log domain (Max Log MAP) is quite complex. This paper describes a low complexity QAM demapper using a simplified demapping algorithm based on the Max-Log-MAP demapper, which exploits the symmetry of QAM constellations to reduce the comparison and multiplication operations. Matlab simulations and FPGA tests show that this QAM demapper has the same throughput and performance as the traditional Max-Log-MAP demapper with considerably less complexity.
出处 《清华大学学报(自然科学版)》 EI CAS CSCD 北大核心 2013年第11期1574-1578,共5页 Journal of Tsinghua University(Science and Technology)
基金 国家自然科学基金面上项目(61271266) 国家“九七三”重点基础研究项目(2013CB329203)
关键词 正交幅度调制(QAM) 解映射 MAX-LOG-MAP算法 现场可编程门阵列(FPGA) quadrature amplitude modulation (QAM) demapping maxsum approximation of the maximum a posterioriprobability in the log-domain (Max-Log-MAP)algorithm field programmable gate array (FPGA)
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