基于FPGA的通用异步收发传输器控制FLASH存储系统设计

UART Controlling FLASH Storage System Design Based on FPGA

为了解决测井数据文件的存储问题,提出了一种基于FPGA实现通用异步收发传输器(UART)控制FLASH存储系统设计的方法。以FPGA作为核心控制器对系统结构进行了模块化分解,以适应自顶向下的设计方法。在Quartus II开发平台中采用Verilog硬件描述语言利用有限状态机,实现了UART控制FLASH的读、写、擦除操作;并给出了UART控制FLASH的数学模型。采用Spansion公司的S29AL016D系列FLASH结合FPGA和UART设计了接口电路。最后在Modelsim环境下进行仿真,验证了该存储系统设计的正确性和可靠性。

In order to solve the issue of logging data file, based on FPGA, a method is put forward to control FLASH storage system through UART. In the design, with FPGA as its core controller, a modular decomposition is adopted to the system structure so as to adapt to the top-down design method. In the Quartus II development platform, Verilog hardware description language and FSM for the purpose of controlling FLASH＇ s operation of reading are adopted, writing and erasing through UART and producing the mathematical model of how UART controls FLASH. By combining FPGA and UART with FLASH of S29ALO16D series from Spansion company, the interface circuit is also designed. The final simulation under the Modelsim environment verifies the validity and reliability of the above mentioned storage system design.