基于数字信号处理器的IEEE 802.11ac低密度奇偶校验码编码器的设计与实现

The Design and Implementation of LDPC Encoder as Specified in IEEE802. 11ac Standard on DSP

本文提出了适用于IEEE 802.11ac标准草案LDPC码编码器的设计方案。设计方案针对LDPC码的校验矩阵的准循环、双对角线的结构特点,采用了具有低复杂度的快速迭代算法,在FreeScale公司的MSC8156 DSP平台上实现了LDPC码的编码器,并对代码进行了合理的优化。测试结果显示,使用MSC8156的一个运算核心进行编码的平均速率可达1Gbps以上,满足系统要求。

A design scheme of LDPC encoder for IEEE802. 11 ac is presented. It is well known that the LDPC code check matrix have quasi-cyclic, dual diagonal structural characteristics. The Design scheme use low complexity fast iterative algorithm, in view of the structural properties of the check matrix. The implementation of the LDPC en- coder on MSC8156 DSP platform was completed, based on the code reasonable optimization. The test results show that the use of a core from MSC8156 average encoding rate can exceed 1 Gbos . to meet the system reduction of 10. 22%.