摘要
阐述了IIC总线的工作原理,提出了一种基于FPGA的IIC总线控制器的实现方法.利用自顶向下的设计方法,设计了IIC总线控制器有限状态机,采用硬件描述语言VHDL实现了IIC总线控制器核的设计,给出了控制器仿真结果,并进行硬件测试.结果表明,该控制器满足IIC总线功能及时序要求,工作稳定可靠.
This paper describes the working principle of IIC bus, presents an FPGA-based implementation of IIC bus controller core, uses top-down design methodology, designs the IIC bus controller finite state ma- chine. Using hardware deseription language (VHDI.), the IIC bus eontroller eore design is achieved, some hardware description statement programs and controller simulation result are given, and test on Aletera's Cy- clone II EP2C35F484C8 chip is done. The results show that the controller core meets IIC functional and tinting requirements, stable and reliable.
出处
《中原工学院学报》
CAS
2014年第1期11-14,共4页
Journal of Zhongyuan University of Technology