便携式逻辑分析仪的设计与实现

Design and Implement of a Portable Logic Analyzer

介绍一种16通道便携式逻辑分析仪,通过FPGA将高速数据采样并缓存,采用USB控制芯片和FPGA协同控制将数据通过USB接口发送到电脑的上位机上显示,简化了以往逻辑分析仪硬件电路部分,降低了逻辑分析仪的成本且便于携带。重点阐述硬件电路部分的设计。

This article describes a 16-channel portable logic analyzer. Sampling is performed through the FPGA and high-speed data buffer, the data is sent to the computer via the USB controller chip and FPGA cooperative con- trol through the USB interface on the PC display, thus simplifying the previous circuit logic analyzer hardware and re- ducing the cost and size of the logic analyzer. Emphasis is put on the hardware circuit design.