一种低寄生电感IGBT半桥模块

IGBT half-bridge module with low parasitic inductance

针对绝缘栅双极型晶体管(IGBT)半桥模块的寄生电感在实际应用中会引起芯片过电压及较大的关断损耗、电磁干扰等问题,设计了一种采用新型芯片布局方式的模块结构。设计中考虑了半桥模块在电力电子电路中的工作方式与模块内部各元件的工作状态,分析了通路寄生电感的作用机理,将工作在同一换流回路中的各元件放置在一起,减小了模块内部换流通路的长度,从而减小了其带来的寄生电感值。为保证功率模块封装的兼容性,制作了具有相同封装尺寸的传统商用型IGBT半桥模块与采用了新型芯片布局方式的IGBT半桥模块,搭建了电感测试电路对制作完成的两种模块进行公平地测试比较。实验结果表明,在模块和外部电路接口不变的情况下,新型模块的寄生电感比传统型减少了35%。

In order to reduce the parasitic inductance of insulated gate bipolar transistor （IGBT） half- bridge module and raise the efficiency of the whole practical circuit, a module structure with improved chip layout was proposed. The working behavior of half-bridge module in power electronic circuits and the working condition of every device were taken into account. Those chips that are in the same working circuit loop were placed in close vicinity. Both the conventional and the proposed modules were fabricated in the same package size for package compatibility. Inductance test circuit was built. The experimental results show that, the parasitic inductance of the proposed module decreases by 35%, compared with the conventional one without modifying the module electrodes.