基于氧化钨的8 Mb高密度阻变存储器设计

Design of 8 Mb High Density Resistive RAM Based on WO_3

设计了一款基于氧化钨的8Mb高密度阻变存储器,采用单晶体管开关、单电阻(1T1R)的存储器单元结构,设计了完整的存储单元、行列译码器、写驱动和灵敏放大器等关键模块。存储器芯片采用HHNEC 0.13μm 1P8M CMOS工艺流片。仿真结果表明,在8F2的高密度存储单元面积下,该存储器可实现准确的数据写入和读出功能。

An 8Mb high density resistive random access memory（RRAM）was designed based on WO3.The 1T1R（1transistor and 1resistive memory cell）RRAM contained memory cell,bitline and wordline decoder,write driver,and sense amplifier,etc.The RRAM was implemented in HHNEC 0.13μm 1P8M CMOS process. Simulation results showed that the RRAM with 8F2 high density memory cells could write and read information correctly at 1.8Vpower supply.