基于GPS的IRIG-B直流码编码器设计

Design of IRIG-B DC-code Encoder Based on GPS

以CPLD可编程逻辑器件作为主功能芯片,设计了IRIG-B直流码编码器的总体结构。采用状态机解析GPS码流的时间信息,用VHDL硬件描述语言设计CPLD内部硬件电路,经过编译和仿真得到正确的的IRIG-B直流码波形。最后,设计并制作了IRIG-B直流码编码器的硬件电路,得到了结构简单、功耗低、经济廉价的IRIG-B编码器。

This paper uses CPLD programmable logic device as the main functional chip,and designs the overall structure of IRIG-B DC-code encoder.This paper designs a state machine to resolve GPS stream＇s time information,and CPLD＇s internal hardware circuit with VHDL,and compiled and simulated to get the correct code of IRIG-B DC waveform.Finally,this paper designs and produced the IRIG-B DC-code encoder＇s hardware circuit,and got a simple structure,low power consumption,the economic cost of the IRIG-B encoder.