AFDX终端测试技术的研究与实现

Research and Implementation of AFDX End System Test Technology

AFDX（航空电子全双工切换以太网）作为大型客机和运输机上的主流机载通信网络,其应用越来越广泛,对AFDX网络及设备的测试需求也必将与日俱增;针对这一需求,提出了一种AFDX终端测试技术的实现方法;该方案使用大规模FPGA和高性能嵌入式处理器,实现了一个AFDX终端系统及终端测试功能;应用结果表明其较好地满足了航空电子网络数据传输的实时性和可靠性需求,并能对AFDX网络的功能和主要性能指标进行测试;该测试终端具备最大128个虚拟链路、1～128ms带宽分配间隙,可进行协议解码分析、故障注入与检测、误码率测试以及IRIG-B时戳等测试功能。

Avionics Full Duplex Switched Ethernet （AFDX） is the major choice of communication network on airliner, and is equipped widely to the real liner. Aiming at the test demand of AFDX network, an approach to implement the AFDX test technology is proposed, which comes true on FPGA and embedded processor. With this approach, an AFDX end system is implemented along with AFDX network test function. The application results of the end system demonstrate that this technology can meet reliability and real--time requirements of avionics data transmission, and can also achieve the target of testing AFDX network performance. This end system is provided with 128 VLs and is able to handle BAG values in range lms to 128ms. Its test function mostly includes protocol decoding and analysis, fault injection and detection, bit error rate test, and IRIG--B time stamp.