摘要
针对标准体硅在CMOS和PD SOI CMOS两种工艺下的nMOSFETs,研究了沟道长度和宽度缩减对热载流子效应的影响。实验结果表明,在两种工艺下,热载流子的退化均随着沟道长度的减小而增强;然而,宽度的减小对两种工艺热载流子退化的影响却截然不同:体硅工艺的热载流子退化随宽度的减小而增强,SOI工艺的热载流子退化随宽度的减小而减小。基于界面态对热载流子效应的影响深入分析了长度减小导致两种工艺下热载流子退化均加重的原因;同时基于边缘电场分布对热载流子效应的影响解释了宽度减小导致两种工艺下热载流子退化规律截然相反的现象。研究结果对于实际深亚微米工艺下,集成电路设计中器件工艺尺寸和版图结构的选择具有一定指导意义。
The effect of channel width and length shrinking on hot carrier effect (HCE) in standard bulk Si CMOS and SOI CMOS nMOSFETs is studied. The experimental results show that the HCE deg- radation enhances with the decrease of channel length both in the standard bulk Si and SOI nMOSFETs. However, the channel width shrinking shows different effect on HCE degradation. The HCE degradation enhances with the decrease of channel width in bulk nMOSFETs while the HCE degradation reduces with the decrease of channel length in SOI nMOSFETs. The effect of interface traps on HCE is discussed in order to discover the main physical mechanism. Meanwhile, the effect of border electric field distribu- tion on HCE is discussed so as to explain the underlaid mechanism. The result can be a guide in making a choice of the device size and layout in IC design in practical deep submicron technology.
出处
《计算机工程与科学》
CSCD
北大核心
2014年第5期786-789,共4页
Computer Engineering & Science
基金
国家重点实验室开放基金课题(ZHD201202)
关键词
热载流子效应
碰撞电离
界面态
垂直电场强度
hot carrier effect (HCE)
impact ionization
interracial state
vertical electric field intensi-ty