摘要
The pulsed laser facility for SEU sensitivity mapping is utilized to study the SEU sensitive regions of a 0.18/zm CMOS SRAM cell. Combined with the device layout micrograph, SEU sensitivity maps of the SRAM cell are obtained. TCAD simulation work is performed to examine the SEU sensitivity characteristics of the SRAM cell. The laser mapping experiment results are discussed and compared with the electron micrograph information of the SRAM cell and the TCAD simulation results. The results present that the test technique is reliable and of high mapping precision for the deep submicron technology device.
The pulsed laser facility for SEU sensitivity mapping is utilized to study the SEU sensitive regions of a 0.18/zm CMOS SRAM cell. Combined with the device layout micrograph, SEU sensitivity maps of the SRAM cell are obtained. TCAD simulation work is performed to examine the SEU sensitivity characteristics of the SRAM cell. The laser mapping experiment results are discussed and compared with the electron micrograph information of the SRAM cell and the TCAD simulation results. The results present that the test technique is reliable and of high mapping precision for the deep submicron technology device.
基金
Project supported by the Industrial Technology Development Program of China(No.A1320110028)
the Key Programs of the Chinese Academy of Sciences(No.110161501038)
