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Effect of re-oxidation annealing process on the SiO_2/SiC interface characteristics 被引量:1

Effect of re-oxidation annealing process on the SiO_2/SiC interface characteristics
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摘要 The effect of the different re-oxidation annealing (ROA) processes on the SiO2/SiC interface charac- teristics has been investigated. With different annealing processes, the flat band voltage, effective dielectric charge density and interface trap density are obtained from the capacitance-voltage curves. It is found that the lowest interface trap density is obtained by the wet-oxidation annealing process at 1050 ℃ for 30 min, while a large num- ber of effective dielectric charges are generated. The components at the SiO2/SiC interface are analyzed by X-ray photoelectron spectroscopy (XPS) testing. It is found that the effective dielectric charges are generated due to the existence of the C and H atoms in the wet-oxidation annealing process. The effect of the different re-oxidation annealing (ROA) processes on the SiO2/SiC interface charac- teristics has been investigated. With different annealing processes, the flat band voltage, effective dielectric charge density and interface trap density are obtained from the capacitance-voltage curves. It is found that the lowest interface trap density is obtained by the wet-oxidation annealing process at 1050 ℃ for 30 min, while a large num- ber of effective dielectric charges are generated. The components at the SiO2/SiC interface are analyzed by X-ray photoelectron spectroscopy (XPS) testing. It is found that the effective dielectric charges are generated due to the existence of the C and H atoms in the wet-oxidation annealing process.
出处 《Journal of Semiconductors》 EI CAS CSCD 2014年第6期128-131,共4页 半导体学报(英文版)
基金 Project supported by the National Natural Science Foundation of China(Nos.51272202,61234006,61274079)
关键词 SiO2/SiC re-oxidation annealing effective dielectric charge interface trap SiO2/SiC re-oxidation annealing effective dielectric charge interface trap
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