摘要
设计一款可用于Class D的比较器。在考虑抗噪能力和分辨率的情况下,引入2路电流反馈,提高抗噪能力,从而可以提高分辨率。采用HHNEC BCD035工艺对该调制器进行电路级设计并用Cadence仿真,该电路可抑制输出电压的错误跳变,失调电压为0.2 mV,增益为38.42 dB,3 dB带宽达到20 MHz,满足高速率要求。
A comparator used in a Class D audio amplifier was designed. Taking the anti-noise capacity and resolution into account,two current-feedback subcircuits are adopted in the design to improve the anti-noise capacity and resolution at the same time. HHNEC BCD035 process is used for circuit design of the modulator and Cadence is for its simulation. The result shows that the circuit can restrain the mistaken voltage jump,the offset voltage can reach 0.2 mV,the gain of pre-amp is 38.42 dB, and the 3 dB bandwidth can reach 20 MHz to satisfy the requirement of high speed.
出处
《现代电子技术》
2014年第7期147-150,共4页
Modern Electronics Technique
