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一种深度包检测引擎的FPGA硬件实现 被引量:4

A Deep Packet Inspection Engine Hardware Design Based on FPGA
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摘要 针对硬件防火墙的防护性能优势,提出一种基于FPGA实现的硬件防火墙,利用FPGA设计深度包检测引擎,实现基于应用层的内容防护。深度包检测引擎支持固定、浮动和统一资源定位符关键词匹配,可实现灵活的表项宽度变化和表项更新操作。实际测试表明,采用基于FPGA设计的深度包检测引擎,硬件防火墙的主要处理指标满足实用性要求。 Considering the protective performance advantages of hardware firewall,a FPGA-based hardware firewall is proposed,which uses FPGA-based deep packet inspection(DPI) engine to realize the content protection of application layer.DPI engine,which supports fixed,floating and uniform resource locator keyword matching,can achieve flexible entries width changing and entries updating.The implementation results show that the performances of hardwire firewall meet the practical requirements by adopting the FPGA-based DPI engine.
出处 《测控技术》 CSCD 北大核心 2014年第6期100-102,109,共4页 Measurement & Control Technology
基金 国家973计划资助项目(2012CB315901) 国家863计划资助项目(2011AA01A103) 国家科技支撑计划资助项目(2011BAH19B01)
关键词 硬件防火墙 FPGA 深度包检测 统一资源定位符 hardware firewall FPGA deep packet inspection uniform resource locator
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