用于继电保护测试装置的正弦基准生成系统

A Sin Reference Generating System for Relay Protection Testing Device

针对目前继电保护测试装置在应用中实现小型化的需求,设计出了基于FPGA的闭环控制正弦信号基准生成系统。采用FPGA作为片上系统,在芯片内集成了数字滤波器和PID控制器。设计出了高通数字滤波器的原型,并通过递推算法在片内实现其功能。分析了信号解调中的幅值相位分离理论,并给出了相位闭环控制框图,推导了控制器的离散表达式。实验结果表明,所设计的信号处理系统在输出信号幅值大于5V时,误差小于万分之一。当输出幅值信号较小时,相比开环系统,采用闭环控制的输出精度得到了明显的改善。在FPGA片内实现闭环正弦生成系统,为继电保护测试装置提高系统集成度,提供了一种全新的设计思路和实现方法。

A closed -loop sin reference generating system has been designed based on FPGA to meet the requirement of highly integrated system in relay protection testing device. An FPGA is always used as an SOC, integrating digital filter and PID controller. The prototype of high pass digital filter has also been designed and the functions are imple- mented on - chip by recursion algorithm. The separating theory of amplitude and phase in demodulation are analyzed and the phase closed - loop control block diagram is given with the discrete expression of the controller being de- duced. Experimental results indicate that the error will under 0.01% when the output signal amplitude is above 5V. When the output signal amplitude is small, the output accuracy will be improved with the close -loop system com- pared with that of the open one. The closed - loop sin generating system in FPGA provides a novel design and imple- mentation method for highly integrated relay protection testing device.