期刊文献+

用于LDPC码快速译码的改进加权比特翻转算法

An Improved Weighted Bit-Flipping Algorithm for High-Speed LDPC Decoding
原文传递
导出
摘要 为了提高低密度奇偶校验码(LDPC)译码器的译码速度,提出了一种基于部分并行比特选择机制的快速多比特翻转算法.根据接收向量中错误具有随机分布的特点,将所有比特划分成若干子块,从每个子块挑选出1个候选翻转比特,再从这些候选比特中挑选出合理数目的比特进行翻转,完成译码迭代.此外,通过引入树形搜索和数据池技术降低该算法核心模块的计算复杂度,以进一步增加算法硬件实现时的译码速度.分析结果表明,相较于多比特翻转算法,利用所提出的算法和相关硬件实现技术,译码器的吞吐量能得到明显的提高.仿真结果验证了快速多比特翻转算法的有效性. In order to improve the decoding speed of low density parity check code (LDPC) codes, a fast weighted bit flipping algorithm with partially parallel bit-chosen is proposed. In this scheme, all bits are firstly divided into several blocks according to the stochastic error distribution in the received vector. And then one bit is chosen from each block to form the candidate set of flipped bits. Finally, a proper number of bits are chosen from the candidate set and flipped to implement the decoding. Furthermore, the tree sorting and data pool methods are adopted to decrease the computational complexity of the key module of the proposed algorithm. Compared with the muhi-bit flippin (MBF) algorithm by simulations, the proposed scheme and the method of hardware implement can achieve significant improvement in the decoding speed.
出处 《北京邮电大学学报》 EI CAS CSCD 北大核心 2014年第2期109-112,共4页 Journal of Beijing University of Posts and Telecommunications
基金 高等学校学科创新引智计划资助项目(B08038) 西安电子科技大学自主科研项目(72001859)
关键词 低密度奇偶校验码 加权比特翻转算法 树形搜索 部分并行 low density parity check code weighted bit flipping algorithm tree sorting partially parallel
  • 相关文献

参考文献5

  • 1刘原华,张美玲.结构化LDPC码的改进比特翻转译码算法[J].北京邮电大学学报,2012,35(4):116-119. 被引量:10
  • 2Liu Z, Pados D A. A decoding algorithm for finite-geometry LDPC codes[J]. Communications, IEEE Transactions on, 2005, 53(3): 415-421.
  • 3Ngatched T M N. An improved decoding algorithm for finite-geometry LDPC codes[J]. Communications, IEEE Transactions on, 2009, 57(2): 302-306.
  • 4Chin-Long W, Ming-Der shieh, Shin-Yo Lin.Algorithms of finding the first two minimum values and their hardware implementation[J]. Circuits and Systems I: Regular Papers, IEEE Transactions on, 2008, 55(11): 3430-3437.
  • 5Wang Zhongfeng, Cui Zhiqiang. A memory efficient partially parallel decoder architecture for quasi-cyclic LDPC codes[J]. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, 2007, 15(4): 483-488.

二级参考文献6

  • 1Gallager R G. Low density parity check codes[ J]. IEEE Trans on Inf Theory, 1962, 8 ( 1 ) : 21-28.
  • 2MacKay D J C, Neal R M. Near Shannon limit perform- ance of low density parity check codes [ J]. IET Electron Lett, 1996, 32(18): 1645-1646.
  • 3Kou Y, Lin S, Fossorier M. Low-density parity-check codes based on finite geometries: a rediscovery and new results[J]. IEEE Trans on Inf Theory, 2001, 47 (7): 2711-2736.
  • 4Dong Guiqiang, Li Yanan, Xie Ningde, et al. Candidate bit based bit-flipping decoding algorithm for LDPC codes [ C]//2009 IEEE International Symposium on Informa- tion Theory (ISIT 2009). Seoul: IEEE Press, 2009: 2166-2168.
  • 5Li Jian, Zhang Xianda. Hybrid iterative decoding for low- density parity-check codes based on finite Geometries [J]. IEEE CommunLett, 2008, 12(1): 29-31.
  • 6郭强.基于可靠率的改进的LDPC码BF译码算法[J].南京理工大学学报,2009,33(2):165-167. 被引量:3

共引文献9

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部