混合信号处理实现2D-DCT的CMOS图像传感器结构

CMOS Image Sensor Architecture with Mixed-Signal Realizing 2D-DCT

为了减少原有混合信号处理方法实现二维离散余弦变换(2D-DCT)的运算周期,提出了一种新型的CMOS图像传感器(CIS)结构.该结构利用2D-DCT可以行列分离以及变换核对称的原理,对像素阵列进行8×8分块,增添采样电容阵列,通过寄存器控制、选择相应核系数的电容比例、结合模拟累加器完成列变换,通过电容复用和数字域累加完成行变换.对结构进行建模验证,结果表明:此结构能够正确实现2D-DCT,保留15.63%DCT系数压缩时,峰值信噪比(PSNR)达到73.54,dB,运算周期缩短为原有混合信号处理方法的25%.该结构提高了传统CIS的输出效率,适用于无线视频传感网络、生物医疗等低功耗高效率成像系统.

A CMOS image sensor architecture achieving two-dimensional discrete cosine transform （2D-DCT） was presented in order to reduce the number of computation periods of traditional mixed-signal processing method. By utilizing the row-column decomposition principle and the symmetrical transform kernel of 2D-DCT, pixel array was divided into 8~8 blocks. The column transform was completed by adding sample capacitor array, choosing the capacitor ratio of corresponding transform kernel coefficient through register, and combining analog accumulator. The row transform was completed through capacitance reuse and digital domain accumulation. Modeling results show that this CIS architecture can achieve 2D-DCT accurately and the PSNR is 73.54 dB when the image is compressed with retaining 15.63% DCT coefficient. The number of computation periods is 25% of that of the traditional mixed-signal processing method. This architecture increases the efficiency of the CIS output and applies to the low-power highefficiency imaging system, such as wireless video sensor network and biomedicine.