复位对FPGA亚稳态和资源利用率的影响

The impact of reset on FPGA metastability and resource utilization

复位是FPGA设计中一个基本而又重要的问题,如果处理不当,不仅可能导致亚稳态的问题,而且会降低设计的资源利用率。分析了不同的复位方式对系统亚稳态和资源利用率的影响,并对不同的目标器件中复位信号的使用给出了建议。

Reset is a basic and important issue in FPGA design , if it′s not handled properly , it may not only lead to metastable problems , but also reduce resource utilization . This paper analyzes the effects of different reset ways on the system metastability and resource utilization , and gives recommendations on the use of reset signal in different target devices .