多时钟源分割方法在时钟树综合中的应用

The Method of Multisource Using in Clock Tree Synthesis

本文以sha256算法模块的数字后端物理设计为例,提出了将多时钟源分割技术应用在传统时钟树综合中的方法。应用该方法后,利用有效时钟偏移,仅通过少量时钟缓冲器的插入就解决了该模块设计中的建立时间违例问题,大大降低了后续时序收敛工作的复杂度,将时序修复耗时缩短为采用传统方法的20%。

The paper uses the example of the physical design of sha256 algorithm to illustrate multisource methodology using in the conventional clock tree synthesis. The methodology has greatly saved the time cost in timing closure by using useful skew and fewer clock buffers＇ insertion. In this case, the time cost has been reduced 20% comparing to the conventional clock tree synthesis.