2UEDAK,SUZUKI H,SUDA K,et al.A 64 bit carry look ahead adder using pass transistor BiCMOS gates[J].IEEE Journal of Solid State Circuits,1996,31(6):810-817.
3DOZZA D,GADDONI M,BACCARANI G.A 3.5 ns,64 bit carry-lookahead adder[C] //Proceedings of IEEE International Symposium on Circuit and Systems.Island of Kos,Greece,1996:297-300.
4MATTHEW S,KRISHNAMURTHY R,ANDERS M,et al.Sub-500 ps 64-b ALUs in 0.18 mm SOI/bulk CMOS:design and scaling trends[J].IEEE Journal of Solid State Circuits,2001,36(11):1636-1646.
5MATHEW S,ANDERS M,KRISHNAMURTHY R,et al.A4 GHz 130 nm address generation unit with 32 b sparse-tree adder core[J].IEEE Journal of Solid State Circuits,2003,38(5):689-695.
6MATHEW S K,ANDERS M A,BLOECHEL B,et al.A4 GHz 300 mW 64 b integer execution ALU with dual supply voltages in 90 nm CMOS[J].IEEE Journal of Solid State Circuits,2005,40(1):162-163.
7JINZ P,SHEN X B,BAI Y Q.A 64 bit fast adder with0.18 μm CMOS technology[C] //Proceedings of IEEE International Symposium on Communications and Information Technologies.Beijing,China,2005:1167-1171.
