基于FPGA的高级加密标准AES设计与实现

Design and implementation of the Advanced Encryption Standard AES Based on FPGA

确保网络与通信安全的最重要的工具就是加密,对称加密中又以AES加密算法最为重要,目前已成为标准,研究AES加密算法对于防范信息安全泄密具有重要意义。本文对AES加密算法做简单的介绍,并利用硬件描述语言进行设计,设计采用流水线的思想,AES-128算法共有10轮,在每一轮之间都插入流水线寄存器,提高系统工作频率,最终下载到FPGA芯片CycloneIII系列的EP3C120F484I7器件中,经验证功能正确。

The most important tool to encrypt the security of networks and communications,is the symmetric encryption algorithm,AES is the Advanced Encryption Standard,which is now the most famous Symmetric encryption algorithm,it is meaningful to research this algorithm.This paper introduces the principle of AES encryption algorithm and the detailed description of the FPGA implementation,to make the optimization to achieve the best speed,the design of the state are designed by pipeline technology.we used the hardware description language to design each modules,fianly examed in the FPGA chip of CycloneIII EP3C120F484I7.