基于PLL重配置技术的正交调制器设计

Design of quadrature modulator based on PLL reconfigurable technology

为了在同一硬件平台上实现多种符号速率和多种通信体制,基于FPGA内部PLL可重配置技术和DDS专用芯片,提出了一种在不同通信体制下实现调制符号率逐比特可变的正交调制器设计方法,并在以EP4SE230为核心的处理平台上进行了硬件实现。通过改变调制器参数并采用矢量信号分析仪对调制信号进行测量,结果显示正交调制器信号的幅频特性和EVM均满足系统要求。采用这种方法实现的调制器具有很强的灵活性,符合数字通信软件无线电的趋势。

In order to achieve a variety of symbol rate and a variety of communication systems on the same hardware platform,based on PLL reconfigurable technology in FPGA and DDS ASIC,a design method for quadrature modulator,which is programmed in EP4SE230,is proposed to implement variable modulation symbol rate bit by bit in different communication systems.By changing the parameters of the modulator and measuring the modulation signal with vector signal analyzer,the results show that the amplitude frequency characteristics and EVM of quadrature modulator meet the system requirements.The modulator with the proposed method achieves great flexibility and compliances software radio trend in digital communication system.