摘要
以等离子显示驱动为例,详细分析了功率驱动芯片在高速开关状态下所引起的电源振荡机理。考虑板级与芯片中驱动器件的主要寄生参数,建立了振荡电路的数学分析模型,基于所建模型,重点研究了环路电阻、芯片寄生电感和负载电容对振荡的影响,提出了减小电源振荡的优化方法,并得到了试验验证。
Based on PDP drive ICs, power oscillation of high power drive ICs caused by high speed switching is analyzed in this paper. Firstly, a mathematical model of oscillating circuit is established, by taking account of main parasitic parameters of PCB and driver ICs. Then the effect of loop resistance, IC's parasitic inductance and load capacitance on oscillation are dis- cussed. Optimal measures are presented to decrease power oscillation, which are validated in the test.
出处
《固体电子学研究与进展》
CAS
CSCD
北大核心
2014年第3期280-287,共8页
Research & Progress of SSE
关键词
功率驱动芯片
电源振荡
高速开关
等离子显示
high power drive IC
power oscillation
high speed switching
plasma display