摘要
提出了对JTAG主控器的一种改进方法 ,并在逻辑上实现了这一改进 .改进后的主控器可以提供连续寻址 16MB存储器页空间的访问方式 ,从而为测试软件程序员提供了良好的平台 .仿真表明该芯片能够提供满足IEEEP1149.1协议的测试信号 .
Based on the improvement of the processing of IC fabrication, an advanced JTAG controller is presented. The controller can address 16?MB memory frame sequentially and provides a better workbench for test soft programmer. A new implementation of the logic and circuit is carried out. The simulation proves that the chip can provide the test signals meeting IEEE P1149.1 protocol.
出处
《华中科技大学学报（自然科学版）》
EI
CAS
CSCD
北大核心
2001年第1期63-65,共3页
Journal of Huazhong University of Science and Technology(Natural Science Edition)
