数字集成电路的时序分析

Timing Analysis of Digital Integrated Circuits

文章对数字集成电路设计中的时序分析作了一个概要的介绍。对一些时序分析算法进行了讨论 ,同时 ,指出伪路径是时序分析中的一个重要问题。因此 ,为了进行有效的时序分析 。

WT5”BZ]The timing analysis in the design of digital integrated circuits is described Some algorithms for the timing analysis are discussed It is pointed out that the false path is an important problem in the timing analysis As a result, both the logical behavior and the temporal behavior of the network must be taken into consideration for effective timing analysis [WT5HZ]