基于GTL技术的高速背板总线设计

A design of high speed backplane bus based on GTL technique

介绍了一个高速背板总线的设计尝试。采用新型的 GTL总线收发器、时钟相位调节和组合式匹配等技术措施 ,解决了总线设计的驱动、时序和信号完整性问题。实现了 10 0 Mbd/

A design of high speed backplane bus is introduced in this paper. The problems of backplane bus design, such as the driver,timing and signal integrate, have solved by using the GTL transceivers,phase adjustment of the clock and combined match techniques. The data rate of 100 Mbd/s has been obtained in our test system.