摘要
介绍了一个时钟测量模块的设计 ,该模块是基于高速数据采集和数字信号处理的 VXI测试模块 ,该模块的采样率高达 50 0 Msps,时间分辨为 2 0
A design of clock measurement module is introduced in this article. This VXIbus module is implemented based on techniques of high speed data acquisition and digital signal processing, its sampling rate is 500 Msps and time resolution is 2 ns.
出处
《核电子学与探测技术》
CAS
CSCD
北大核心
2001年第1期14-17,共4页
Nuclear Electronics & Detection Technology
