摘要
本文提出一种适于CMOS集成电路的柔性模块生成器,该系统将电路描述按照一定的约束条件(布图面积即模块高度和宽度或宽长比,PIN的位置,最大延迟)自动转换成版图.本文采用了一种二维的柔性模块布图模型,使系统具有一定的灵活性.因此,该系统不仅可作为一种自动建库的工具,也可作为一个晶体管编译器为一个分级式的布图系统按照实际的布图要求生成底层的宏单元或库中没有的宏单元模块.
Abstract This paper describes a flexible module generator for CMOS circuits. It can automatically generate a mask from a circuit description. The layout model considered here is a variable shape two-dimensional model composed of a set of rows of paired PMOS and NMOS transistors. The module generator can be used as a tool to automatically build cell library, and can be used as a layout synthesis to generate reasonable macro-cell for a hiererchy layout system.
基金
国家自然科学基金