以CS-ACELP算法为核心的数字语音记录设备

An Optimized Digital Speech Recording Algorithm Based on CS-ACELP and Its DSP Implementation

在介绍 ITU G.72 9CS- ACEL P语音压缩编码的基础上提出了由 DSP芯片实现基于该算法的数字语音记录设备的方案 ,且通过算法优化和改进 ,使一片 C5 4DSP芯片能编码 2路输入数字语音信号 .仿真实验结果表明 ,算法优化和改进后的复杂度仅是此前的 1/ 8,系统的压缩能力在相同的语音质量下是现有基于 ADPCM语音记录设备的 4倍 .

Design of a digital speech recorder based on the ITU G.729 CS-ACELP speech coding algorithm implemented on a DSP chip is described. The algorithm is optimized so that two channels of input speech can be processed in a single C54 chip. Simulation results show that the complexity of the optimized algorithm has been reduced to 1/8 of the original, and the compression ratio is 4 times that of systems based on ADPCM.