0.35μmCMOS工艺实现的1.9GHz上变频器

A 1.9 GHz Up-Conversion Mixer in 0.35μm CMOS Technology

分析了利用深亚微米CMOS工艺进行射频集成电路设计的方法 ,在此基础上设计出了采用标准 0 3 5 μmCMOS工艺的输出频率在 1 9GHz的上变频器 ,它可以用在WCDMA发射 /接收机中 .整个设计利用SPICE软件和HPADS软件进行电路和系统模拟 ,模拟结果 :三阶互调IIP3为 1 0dBm ,转换增益大于 1 0dB .已经利用Cadence工具进行版图设计和验证 ,最后通过美国MOSIS工程流片 .芯片面积大约为 0 6mm2 .目前初步的性能测试已经完成 .芯片混频效果良好 .在单电源 +3 3V供电情况下 ,功耗小于 6 0mW .进一步的测试将在近期完成 .

The design method of RF ICs with deep sub micron CMOS technology is analysed. On the basis of the analysis, an up conversion mixer working at the frequency of 1 9?GHz with a standard 0 35?μm CMOS process is designed. Simulation in SPICE and HP ADS demonstrates the good performance of the chip with the IIP3 of 10?dBm and the conversion is greater than 10?dB. After the layout design in Cadence, the chip is realized with the help of MOSIS fabrication project in the U.S. The chip area is about 0 6?mm 2. The chip is tested and a good performance of frequency mixing is obtained. Under the voltage supply of 3 3?V, the power consumption is below 60?mW. further testing will be completed soon.