摘要
提出了两种实现 TEA的结构 ,并采用其中一种结构设计了 TEA加解密处理器电路模块 ,将其成功地应用在非接触的智能 IC卡中 .该加解密处理器硬件模块可分别实现加密和解密运算 ,循环迭代次数具有可编程特性 .该处理器模块占用较小的芯片面积 ,具有很小的功耗 ,可以方便地与 8位微处理器连接 ,适用于各种嵌入式系统中 .
TEA is a symmetric block encryption algorithm based on Fe is tel iteration,whose security is guaranteed by its 128-bits key and the large nu mber of iterations.In this paper,we present two architectures of TEA for VLSI im plementation.With one of the architectures,a VLSI processor module is designed f or the encryption and decryption of TEA,which has been used in the contact-less smart IC card successfully.The hardware processor module can be used in encrypt ion and decryption,respectively,and the number of iterations is programmable.Thi s module,with small silicon area,low power consumption and flexible interface wi th 8-bit external microprocessor,applies to many embedded systems.
