时钟延时及偏差最小化的缓冲器插入新算法

A Novel Buffer Insertion Algorithm for Clock Delay and Skew Minimization

本文提出了以最小时钟延时和时钟偏差为目标的缓冲器插入新算法 .基于Elmore延时模型 ,我们得到相邻缓冲器间的延时是缓冲器在时钟树中位置的凸函数 .当缓冲器布局使所有缓冲器间延时函数具有相同导数值时 ,时钟延时达到最小 ;当所有源到各接收端点路径的延时函数值相等时 ,时钟偏差达到最小 .对一棵给定的时钟树 ,我们在所有从源点到各接收端点路径上插入相同层数的缓冲器 ,通过优化缓冲器的位置实现时钟延时最小 ;通过调整缓冲器尺寸和增加缓冲器层数 ,实现时钟偏差最小 .

In this paper,we propose a novel buffer insertion theory for clock delay and skew minimization.Based on the Elmore delay model,buffer to buffer delay is a convex function of buffer positions in a clock tree.The optimal buffer placement for delay minimization is achieved when all delay functions have the same derivative values.The minimal skew can be obtained by equalizing delay functions of different source to sink paths.For a given clock routing tree,we initially insert the same level of buffers in all the source to sinks paths,then minimize the clock delay by optimizing buffer positions,and minimize skew by simultaneous buffer level augment and buffer sizing.