摘要
本文以高电场 ( >11 8MV/cm)恒电流TDDB为手段研究了厚度为 7 6、10 3、12 5、14 5nm薄氧化层的击穿统计特性 .实验分析表明在加速失效实验中测量击穿电量Qbd的同时 ,还可以测量击穿时的栅电压增量ΔVbd.因为ΔVbd的统计分布反映了栅介质层中带电陷阱的数量及其位置分布 ,可以表征栅介质层的质量和均匀性 .此外由Qbd和ΔVbd能够较合理地计算临界陷阱密度Nbd.实验结果表明本征击穿时Nbd与测试条件无关而随工艺和介质层厚度变化 .同样厚度时Nbd反映不同工艺生成的介质质量 .陷阱生成的随机性使Nbd随栅介质厚度减小而下降 .氧化层厚度约10nm时Nbd达到氧化层分子密度的 1%发生击穿 ( 10 2 0 cm-3) .Nbd的物理意义清楚 ,不象Qbd随测试应力条件变化 ,是薄栅介质层可靠性的较好的定量指标 .
The statistical properties of TDDB in 7.6-14.5 nm gate oxide films under high stress field (>11.8MV/cm) are studied. It is proved that gate voltage increment at breakdown ΔVbd represents magnitude and position distribution of charge occupied traps, which reflects quality and uniformity of dielectric film. The calculated critical trap density Nbd by total charge to breakdown Qbd and ΔVbd is valuable for quantitative evaluation of the reliability of thin gate dielectric film. Experimental results show that Nbd of same thickness films is independent with field stress but related to film quality. It also shows that Nbd decreases with thinner films due to the statistical property of trap generation. Nbd is about 1020cm-3 with 10 nm oxide films, which means dielectric breakdown occurs when trap density reaches 1% of the molecular density. As Nbd is an intrinsic indicator of reliability of thin dielectric films, it is more important in real applications than Qbd.
出处
《电子学报》
EI
CAS
CSCD
北大核心
2001年第11期1522-1525,共4页
Acta Electronica Sinica
关键词
集成电路
薄栅介质
可靠性
缺陷统计分析
Calculations
Dielectric films
Electric breakdown
Electric fields
Electron traps
Integrated circuit testing
Reliability
Statistical methods
Thin films