摘要
基于并行语言的操作语义 ,提出一组将语言构造模块转化为硬件电路的规则。利用这些规则 ,系统地将程序转化为由寄存器、锁存器及数据路径组成的电路。
This paper studies hardware synthesis from parallel programs. Based on operational semantics of a parallel language, a set of transformation rules for various language constructs is established. By these rules, programs are systematically transformed to hardware circuits composed of registers, latches, and data paths. The correctness of the hardware implementation is ensured by these rules.
出处
《华东理工大学学报（自然科学版）》
CAS
CSCD
北大核心
2001年第5期454-458,462,共6页
Journal of East China University of Science and Technology
基金
教育部高等学校骨干教师资助计划
国家自然科学基金资助项目 ( 6 970 30 0 8)
国防科技重点实验室基金资助项目( 99JS94.10 .1.DZ42 0 1
