摘要
论述了MPLS信令协议、IP路由信息映射成ATM标记的方法、可实施VC合并ATM LSR的体系结构 ,阐述了输出缓冲体系结构模型的组成及其工作过程 ,对输出缓冲体系结构模型中执行VC合并功能的输出缓冲模块 (OBM )进行了深入的分析·指出对于最实际的目的而言 ,在信元级 ,由VC合并带来的对附加缓存容量的要求并非很大 ;在包一级 ,VC合并获得了比非VC合并更大的灵活性 ,更重要的是通过实施部分VC合并能够对QoS控制提供很强的潜在支持·
Discussed MPLS signaling protocols, methods of mapping IP routing information into ATM labels,and architectures of VC merge capable ATM LSR were discussed. The composing of the output-buffered module and the working process were expatiated. The output buffered module that is capable of implementing VC merging function in output buffered architecture was analyzed deeply. In view of actual intention, the demand to capacity of the extra buffers resulting from VC merging is not large in cell level; VC merging can obtain larger flexibility than the non VC merging can in packet level. The project can provide potential supporting to QoS control by implementing part merging.
出处
《东北大学学报(自然科学版)》
EI
CAS
CSCD
北大核心
2001年第5期505-508,共4页
Journal of Northeastern University(Natural Science)
基金
国家自然科学基金资助项目 ( 6 99730 11)