一种小波分解滤波器高速实现结构

AN IMPLEMENTATION OF WAVELET DECOMPOSITION FILTER BASED ON SYSTOLIC STRUCTURE

近年来,小波变换得到了广泛的应用,快速塔式分解算法是它应用的一个有利工具,其地位相当于FFT之于Fourier分析,因此DWT的快速硬件实现变成了其应用的一个重要问题,本文通过将并行systolic FIR滤波器结构引入小波分解滤波器的设计,得到了一种小波分解滤波器的实现结构。该结构由于应用了systolic技术及采用并行结构,除了可以提高运算速度外,还可以提高系统的数据吞吐率以及降低系统功耗。

In recent years, the wavelet transform has been widely used in many fields. The fast tower-type algorithm is an efficient tool. Its importance is just like that of FFT in the Fourier analysis. Therefore the hardware implementation of the DWT is an important problem in its applications. With the introduction of the parallel systolic FIR filter structure to the design of the wavelet decomposition filter, an implementation structure of wavelet decomposition filter is presented in this paper. As being parallel and systolic, the structure can increase data throughput and reduce power consumption of the system as well as enhance operation speed.