基于FPGA的FIR滤波器高效实现

Efficient Implementation of FIR Filter using FPGA

本文针对在ＦＰＧＡ中实现ＦＩＲ滤波器的关键──乘法运算的高效实现进行研究，首先给出了将乘法转化为查表的ＤＡ算法，然后简要介绍整数的ＣＳＤ表示和我们根据ＦＰＧＡ实现要求改进的最优表示；接着，本文讨论了在离散系数空间得到ＦＩＲ滤波器系数最优解的混合整数规划方法：最后采用这一方法设计了最优表示离散系数ＦＩＲ滤波器，通过ＦＰＧＡ仿真验证这一方法是可行的和高效的。

The efficient implementation of multipliers is the key of using FIR filters in FPGA. First, we introduce the Distributed Arithmetic which coverts the multiplications into some look-up operations; second, in this article the CSD representation of integer is introduced, followed by a improved optimum representation according to the FPGA structure; then we present a method that uses mixed integer programming to design the FIR filter in a discrete coefficient space; finally, the implementation of FIR filter in FPGA is discussed, and the result of simulations prove this method is feasible and efficient.