一种改进的高层功耗估计方法

An Improved Estimation Method of High-Level Power Dissipation

本文讨论了集成电路高层功耗估计方法,并针对线性位相关系数模型提出了一种更为精确的功耗估计方法,它可用于功耗驱动的VLSI高层综合。实验结果表明当信号为有限参数的平稳时间序列时,这种估计方法比原有用信号的相关系数来代替强相关位相关系数的方法具有较高的精度,从而提高了在VLSI高层设计时对模块功耗估计的精度。

Estimation of IC high level power dissipation problem is discussed. Based on the linear relation model, a more accurate method is proposed to estimate the power dissipation. This method is beneficial to the high level synthesis of power driven VLSI. Experiment results demonstrated that for stable ARMA(N,M) model time-series signals, this method will provide higher precision than the traditional one in which strong bit correlation coefficients are replaced by the weaker signal correlation coefficients. In the process of high level VLSI design, this approach can lead to more accurate estimation of power dissipation of the IC modules under design.