介质隔离高稳定低噪声对管电路的工艺研究

An Investigation into the Process for High-Stability and Low-Noise Pair Transistor Circuit

文章采用先进的全介质隔离、高频低噪声、浅结工艺研制高稳定性低噪声对管电路。该器件具有两管电流放大系数对称性好 ( h FE=97% )、噪声系数低 ( NF≤ 3d B)、隔离度高 ( g≥ 40 d B)、共模抑制比高 ( CMRR≥ 80 d B)和截止频率高 ( f T≥ 60 0 MHz)

An all dielectric isolation, high frequency, low noise and shallow junction process is presented in the paper, which has been used to fabricate high stability and low noise pair transistor circuit The fabricated circuit features good pair transistor symmetry of current amplifying factor( h FE =97%), low noise factor( N F≤3 dB), large isolation degree( g ≥40 dB), large common mode rejection ratio (CMMR≥80 dB) and high cut off frequency ( f T≥600 MHz)