一种高速直接数字频率合成器及其FPGA实现

A Direct Digital Frequency Synthesizer Implemented with FPGA

介绍了一种用于 QAM调制和解调的直接数字频率合成器 ,该电路同时输出 1 0位正弦和余弦两种波形 ,系统时钟频率为 5 0 MHz,信号的谐波小于 - 72 d B。输出信号的范围为 DC到 2 5MHz,信号频率步长为 0 .0 1 1 6Hz,相应的转换速度为 2 0 ns,建立时间延迟为 4个时钟。直接数字合成器 ( DDFS)采用一种有效查找表的方式生成正弦函数 ,为了降低 ROM的大小 ,采用了 1 /8正弦波形函数压缩算法。直接数字频率合成器的数字部分由 Xilinx FPGA实现 。

A direct digital frequency synthesizer (DDFS) used for QAM modulation and demodulation is presented, which synthesizes a 10 b output sine and cosine wave with a spectral purity of -70 dB at 50 MHz The synthesizer covers a bandwidth from dc to 25 MHz in 0 0116 Hz step with a corresponding switching speed of 20 ns and a tuning latency of 4 clock cycles An efficient look up table method for calculating the sine function is used, and a compressed algorithm that only calculates 1/8 sine function is employed to reduce the volume of ROM The whole digital system is implemented with Xilinx FPGA, and the digital signals are output through two D/A converters