无线电定位接收机中高速计数器的设计及其FPGA实现

Design and FPGA Actualization of High-speed Counter in Radio Positioning Receiver

在无线电定位接收机信号处理中 ,为了准确的测量TOA ,对计数器的计数精度有极高的要求。本文提出了一种利用常用逻辑器件 ,结合现场可编程器件实现 2 0 0MHz甚至更高频率的高速计数器的方法 ,并与计算机接口。该计数器可用于高精度的TOA ,PW测量等方面。

In the process of radio positioning receiver in order to survey TOA accurately, there is high requirement for the accuracy of counter. This paper provided an actualization of 200 MHz or even more high frequency counter and presented the PC interface. The counter can be used in the survey of TOA,PW etc.