SoC芯片设计方法及标准化

METHODOLOGIES AND STANDARDIZATION OF SOC DESIGN

随着集成电路技术的迅速发展 ,集成电路已进入系统级芯片 (So C)设计时代 .So C芯片的集成度越来越高 ,单芯片上的集成度和操作频率越来越高 ,投放市场的时间要求越来越短 .为了实现这样的 So C芯片 ,设计者越来越依赖于 IP模块的重用 .So C复杂性的提高和 IP模块的多样化 ,So C芯片中多个厂商不同 IP模块的使用 ,导致了 IP模块可重用的许多问题 .IP模块和片上总线 ,以及 EDA工具接口的标准化 ,是解决 IP模块标准化的很好途径 ;另一方面 ,So C芯片设计的复杂性和嵌入软件所占比重的增加 ,要求更高层次的系统抽象和软硬件的协同设计 ,使用更流行的设计语言进行系统的硬件设计和更有效的系统设计方法 .描述了 So C芯片设计中的 IP模块可重用技术以及所存在的问题 ,介绍了 So C IP模块和片上总线结构的标准化 ,讨论了基于 C/C++扩展类库的系统级描述语言和基于平台的 So

With the development of VLSI technology, system on a chip (SoC) design is the main solution to handle the increasing design complexity with short time to market. A single chip could reach tens and hundreds millions gates and 500 to 1000MHz operating frequency. To implement such a system, the designers are much more dependent on the reuse of IP blocks. The increasing complexity of SoC, the variation of IP blocks, and many different IP blocks from multiple vendors used in one SoC result in many problems with the reusability of IP blocks. An efficient and feasible method to solve these problems is developing standards for IP block interface, on chip bus and the interface between various EDA tools. The increase of SoC design complexity and embedded software components requires system abstract and hardware/software co design at a higher level, describing the system with popular system design languages, and using more efficient system design methods. In this paper, the IP reuse technology in SoC design is described, the standardization of IP blocks, on chip bus and the interface between EDA tools are introduced, and the system level description languages based on C/C++ extended class library and the platform based SoC design method are discussed.